1. Technical Field of the Invention
This invention relates generally to communication systems and, more particularly, to radio receivers and transmitters used within such communication systems.
2. Description of Related Art
Communication systems are known to support wireless and wire-lined communications between wireless and/or wire-lined communication devices. Such communication systems range from national and/or international cellular telephone systems to the Internet to point-to-point in-home wireless networks. Each type of communication system is constructed, and hence operates, in accordance with one or more communication standards. For instance, wireless communication systems may operate in accordance with one or more standards including, but not limited to, IEEE 802.11, Bluetooth, advanced mobile phone services (AMPS), digital AMPS, global system for mobile communications (GSM), code division multiple access (CDMA), local multi-point distribution systems (LMDS), multi-channel-multi-point distribution systems (MMDS), and/or variations thereof.
Depending on the type of wireless communication system, a wireless communication device, such as a cellular telephone, two-way radio, personal digital assistant (PDA), personal computer (PC), laptop computer, home entertainment equipment, et cetera, communicates directly or indirectly with other wireless communication devices. For direct communications (also known as point-to-point communications), the participating wireless communication devices tune their receivers and transmitters to the same channel or multiple channels (e.g., one or more of the plurality of radio frequency (RF) carriers of the wireless communication system) and communicate over that channel or channels. For indirect wireless communications, each wireless communication device communicates directly with an associated base station (e.g., for cellular services) and/or an associated access point (e.g., for an in-home or in-building wireless network) via an assigned channel, or channels. To complete a communication connection between the wireless communication devices, the associated base stations and/or associated access points communicate with each other directly, via a system controller, via the public switch telephone network, via the internet, and/or via some other wide area network.
For each wireless communication device to participate in wireless communications, it includes a built-in radio transceiver (i.e., receiver and transmitter) or is coupled to an associated radio transceiver (e.g., a station for in-home and/or in-building wireless communication networks, RF modem, etc.). As is known, the receiver receives RF signals, demodulates the RF carrier frequency from the RF signals via one or more intermediate frequency stages to produce baseband signals, and demodulates the baseband signals in accordance with a particular wireless communication standard to recapture the transmitted data. The transmitter converts data into RF signals by modulating the data in accordance with the particular wireless communication standard to produce baseband signals and mixes the baseband signals with an RF carrier in one or more intermediate frequency stages to produce RF signals.
As is known, phase locked loops (PLL) are commonly used in integrated wireless transceivers as components for frequency generation and modulation due to their high level of integration and ability to operate over a wide range of frequencies. As is further known, two basic PLL topologies exist, usually referred to as “type 1” and “type 2”, respectively. The general structure is common to both types of PLLs, namely a phase detector, a lowpass filter (LPF), a voltage controlled oscillator (VCO) and a feedback path. The phase detector serves as an “error amplifier” in the feedback loop, thereby minimizing the phase difference between the input reference signal and the feedback signal. The loop is considered “locked” if this phase difference is constant with time.
In “type 1” PLLs, the phase detector generates square voltage pulses whose duration is proportional to the phase error. These voltage pulses are filtered by the LPF to generate a smooth VCO control voltage whose amplitude is proportional to the phase error. The VCO responds to the change in control voltage by increasing or decreasing its oscillation frequency. The feedback action of the PLL then causes the VCO to lock to the desired operating frequency.
In “type 2” PLLs, also known as “charge pump based PLLs”, the topology includes a phase and frequency detector, a charge pump, a loop filter, a voltage controlled oscillator (VCO), and a feedback loop path. The phase and frequency detector compares the phase and frequency of a reference signal with the phase and frequency of a feedback signal (e.g., the output oscillation produced by the VCO fed back to the phase and frequency detector via the feedback loop). If the phase and/or frequency of the reference signal leads the phase and/or frequency of the feedback signal (which occurs when the output oscillation is below the desired rate), the phase and frequency detector generates an up signal. In response to the up signal, the charge pump increases the positive current it outputs, which, when filtered by the loop filter, increases the control voltage input of the VCO. With an increase in the control voltage, the VCO increases the rate of the output oscillation. If the phase and/or frequency of the reference signal lags the phase and/or frequency of the feedback signal (which occurs when the output oscillation is above the desired rate), the phase and frequency detector generates a down signal. In response to the down signal, the charge pump increases the negative current it outputs, which, when filtered by the loop filter, decreases the control voltage input of the VCO. With a decrease of the control voltage input, the VCO decreases the rate of the output oscillation.
In an ideal PLL, the VCO operates linearly, which can be mathematically expressed as:θout(t)=KVCO∫Vcntl(t)dt,where KVCO is the gain (specified in MHz/volt, for example) of the VCO, θout is the output oscillation of the VCO, and Vcntrl is in the input control voltage of the VCO. Based on this ideal model, when the PLL settles to a desired output frequency (i.e., the output of the VCO), the input control voltage of the VCO assumes a constant value. When used as a modulator, the control voltage varies around this constant value according to the desired modulation pattern, thereby generating frequency modulation. It follows directly from the above equation that the modulated signal is proportional to the change in control voltage with a proportionality constant equal to Kvco. In practice, however, the VCO does not operate linearly since the gain of the VCO (i.e., Kvco) is not a constant, but varies with integrated circuit fabrication process, PLL frequency band, control voltage amplitude, and temperature. For instance, for a PLL that has a wide frequency range of operation, the gain of the VCO may vary from its nominal design value by as much as +/−50%. Since Kvco is a key parameter governing the dynamic behavior of the PLL, when If the PLL is used as a modulator (e.g., in a translational loop), the large variation of VCO gain may produces prohibitively large modulation errors.
One solution to reduce the adverse affects of the variations of the VCO gain is to design the baseband processor to account for the VCO gain variations. This solution, however, relies on an assumed VCO gain variation, not an actual variation, and may therefore not be precise. As such, this solution is of limited benefit. Another solution is to limit the VCO gain to a small value. This, however, reduces the dynamic range of the PLL such that, if an appreciable offset exists from ideal operation of the PLL.
Therefore, a need exists for a method and apparatus to calibrate the PLL dynamics to approach ideal operation of a PLL.